ucb-bar/chipyard
FreeAn Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
About ucb-bar/chipyard
Chipyard is an open source framework for agile development of Chisel-based systems-on-chip. It integrates the Chisel HDL, Rocket Chip SoC generator, and other Berkeley projects to produce RISC-V SoCs. The framework includes multiple processor cores (Rocket, BOOM, CVA6), vector units (Saturn, Ara), accelerators (Gemmini, NVDLA), memory systems, peripherals, and tooling. It supports multiple concurrent flows: software RTL simulation, FPGA-accelerated simulation via FireSim, automated VLSI flows via Hammer, and software workload generation via FireMarshal. Chipyard is actively developed by the Berkeley Architecture Research Group at UC Berkeley.
Key Features
Pros & Cons
- Open source and free to use
- Modular and extensible framework with many pre-built components
- Supports multiple concurrent hardware development flows (simulation, FPGA, VLSI)
- Actively maintained by UC Berkeley research group with community support
- Comprehensive documentation and user forum
- Requires familiarity with Chisel HDL and hardware design concepts
- Steep learning curve for beginners in SoC development
- Linux-based workflow dependency (does not fully support Windows)